Initial commit

target.lua

@@ -0,0 +1,67 @@
+local REGS = {
+	al = {bits = 8, mask = 0x1},
+	ah = {bits = 8, mask = 0x2},
+	ax = {bits = 16, mask = 0x3},
+	eax = {bits = 32, mask = 0x3},
+	
+	bl = {bits = 8, mask = 0x4},
+	bh = {bits = 8, mask = 0x8},
+	bx = {bits = 16, mask = 0xC},
+	ebx = {bits = 32, mask = 0xC},
+	
+	cl = {bits = 8, mask = 0x10},
+	ch = {bits = 8, mask = 0x20},
+	cx = {bits = 16, mask = 0x30},
+	ecx = {bits = 32, mask = 0x30},
+	
+	dl = {bits = 8, mask = 0x40},
+	dh = {bits = 8, mask = 0x80},
+	dx = {bits = 16, mask = 0xC0},
+	edx = {bits = 32, mask = 0xC0},
+	
+	di = {bits = 16, mask = 0x100},
+	edi = {bits = 32, mask = 0x100},
+	
+	si = {bits = 16, mask = 0x200},
+	esi = {bits = 32, mask = 0x200},
+	
+	bp = {bits = 16, mask = 0x400},
+	ebp = {bits = 32, mask = 0x400},
+	
+	sp = {bits = 16, mask = 0x800},
+	esp = {bits = 32, mask = 0x800},
+	
+	ds = {bits = 16, mask = 0x100},
+	es = {bits = 16, mask = 0x2000},
+	fs = {bits = 16, mask = 0x4000},
+	gs = {bits = 16, mask = 0x8000},
+}
+
+local REG_CLASSES = {
+	reg8 = {
+		items = {"al", "ah", "bl", "bh", "cl", "ch", "dl", "dh"}
+	},
+	regn8 = {
+		items = {"eax", "ebx", "ecx", "edx", "ax", "bx", "cx", "dx", "di", "si", "bp", "edi", "esi", "ebp"}
+	},
+	seg = {
+		items = {"ds", "es", "fs", "gs"}
+	},
+	rmptr = {
+		items = {"bx", "bp", "di", "si"}
+	}
+}
+
+for _, reg_class in pairs(REG_CLASSES) do
+	local mask = 0
+	for _, reg in ipairs(reg_class.items) do
+		mask = mask | REGS[reg].mask
+	end
+	reg_class.mask = mask
+end
+
+return {
+	GPR_SIZE = 32,
+	REGS = REGS,
+	REG_CLASSES = REG_CLASSES,
+}